Careers

About Us 

PerfectVIPs is a leading Semiconductor company, providing ASIC Design and Verification Services, headquartered in California, USA with design centers in Bangalore, Bhubaneshwar and Ahmedabad in India. We offer Design and Verification Services which includes Micro-architecture development, RTL coding, Synthesis, developing custom and standard VIPs, Verification environment development and functional verification using both conventional and advanced techniques.

The mission of PerfectVIPs is to render long term, high quality Semiconductor ASIC Design and Verification services providing highest degree of customer satisfaction.

Our Aim is to understand comprehensive requirements of clients and to meet these requirements through dedicated efforts. Our vision is to serve our clients globally with commitment to quality and excellence by providing high quality services.

India Openings:

1) Job # VE701 : Verification Engineer

Job Duties: 

Work as part of a dynamic, motivated, hardworking team handling block and full-chip verification of complex SoCs. Your responsibilities may include Verification environment development, Test cases development, Function and code Coverage Analysis, etc. You may also work on Verification IP development or IP Verification activities.

Capabilities:

  • Strong technical fundamentals with superior analytical and problem solving skills.
  • Knowledge of HVLs (System Verilog, e, Vera) and HDLs (Verilog/VHDL) highly desirable.
  • Understanding of UVM/OVM verification concept is desirable.
  • Knowledge of any serial protocol like PCIe, Ethernet, USB, SATA, SAS, DDR, etc. is a plus.
  • Familiarity with OOPs and scripting languages is desired.
  • Good communication skills, both written and oral.

Education: BE/ ME/ B.Tech/ M.Tech/ MS

Experience: 3-5 Years

Location: Bangalore, Bhubaneshwar, Ahmedabad

Send your Resume to: career@perfectvips.com

2) Job # VE702 : Sr. Verification Engineer

Job Duties: 

Work as part of a dynamic, motivated, hardworking team handling block and full-chip verification of complex SoCs. Your responsibilities may include leading the verification team delivering end to end verification consisting of Verification plan and test plan development, Verification environment development, Function and code Coverage Analysis, software integration, etc. You may also lead work on Verification IP development or IP Verification activities.

Capabilities:

  • Very strong proficiency in Verilog, C/C++, SystemC, SystemVerilog.
  • Prior expertise with OVM/UVM based test bench with assertion is a big plus.
  • Working experience in functional coverage and constrained random testing.
  • Expertise in verification of Ethernet, PCIe, SATA, USB, DDR Memory Controller, etc.
  • ARM microprocessor-system verification is a big plus.
  • Good communication skills, both written and oral.

Education: BE/ ME/ B.Tech/ M.Tech/ MS

Experience: 6-10 Years

Location: Bangalore, Bhubaneshwar, Ahmedabad

Send your Resume to: career@perfectvips.com

US Openings:

1) Verification Engineer - II ( Multiple Positions)

Job Duties: 

Develop functional verification components (test bench, tests, checker and coverage ) for 12G SAS, SATA, FC 32G, Ethernet 100G, ONFI, NAND Flash, eMMC, USB, PCIE, NVMe & AXI base IPs, FPGAs, ASICs & SOCs. Travel to various unanticipated client sites.

Capabilities:

Master's degree (or its foreign equi.) in C.S., Elec. &Comm. Systems/Engg, Elec. Engg. Tech., Applied Elec. VLSI, or rel. with know. of at least 7 of the foll. skills: architecting Coverage Driven verification environments; developing test-bench, test plans, tests, debugging failures; analyzing design specs.; Verilog & System Verilog; C++, SystemC, Vera, Specman, PERL, SAS, SATA, FC, Ethernet, PCIe, NVMe, ONFI and Gate level Verification. The Employer will also accept Bachelor's degree (or its foreign equi.) with 5 years of progressive exp. in the verification field and know. at least 7 of the skills listed above.

Location: San Jose, CA

Send your Resume to: career@perfectvips.com

2) Job # PDE704 : Sr. Physical Design Engineer

Job Duties: 

Work as part of a dynamic, motivated, hardworking team. Proficient in implementing tool flows and developing CAD methodologies for optimal execution of high performance and low power physical design in the domains such as Networking, SSD Storage, IoT, Communication, etc.

Capabilities:

  • P&R/timing closure/backend activities and be accountable for meeting project development schedules.
  • The Engineer will be required to code in scripting languages, TCL and UNIX shell languages.
  • Other script languages such as AWK, PERL, and C are a plus.
  • Block level physical design and timing closure
  • Static Timing/Crosstalk Analysis
  • Synthesis/Physical Synthesis
  • Power/IR/EM analysis & power optimization
  • Formal and physical verification (LVS/DRC/ERC)

Education: BE/ ME/ B.Tech/ M.Tech/ MS

Experience: 5-10 Years

Location: San Jose, CA

Send your Resume to: career@perfectvips.com

3) Job # DFT705 : Sr. DFT Engineer

Job Duties: 

Work as part of a dynamic, motivated, hardworking team. Proficient in developing mixed-signal DFT blocks.

Capabilities:

  • Generation of test patterns
  • Verification of test modes and test pattern prior tape out
  • Validation of test modes in the lab or on ATE
  • Act as a primary interface between Design and Test Engineering
  • Execute DFT DRC checks based on a post-scan insertion netlist
  • Verify the DFT functional correctness of the design using VCS/SystemVerilog
  • Execute ATPG using Synopsys DFT TetraMAX to achieve high fault coverage targets

Education: BE/ ME/ B.Tech/ M.Tech/ MS

Experience: 5-10 Years

Location: San Jose, CA

Send your Resume to: career@perfectvips.com

 

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